Design and Fabrication Techniques for 3-Dimensional Integrated Circuits

Award Information
Agency: Department of Defense
Branch: Defense Advanced Research Projects Agency
Contract: HR0011-10-9-0011
Agency Tracking Number: 09SB1-0133
Amount: $750,000.00
Phase: Phase II
Program: SBIR
Solicitation Topic Code: SB091-008
Solicitation Number: 2009.1
Solicitation Year: 2009
Award Year: 2010
Award Start Date (Proposal Award Date): 2010-08-30
Award End Date (Contract End Date): 2012-08-29
Small Business Information
5821 Sky Park Dr., Plano, TX, -
DUNS: 828058508
HUBZone Owned: N
Woman Owned: Y
Socially and Economically Disadvantaged: Y
Principal Investigator
 Nisha Checka
 (617) 500-5481
Business Contact
 Nisha Checka
Title: CEO/Founder
Phone: (617) 500-5481
Research Institution
The 3-D integration of systems through monolithic wafer stacking is an emerging technology that can alleviate power, delay, and area problems for digital circuits and can enable a host of new applications in the system on a chip design space. Currently, CAD tools for 3-D integration are severely lacking stagnating potentially explosive growth of the technology. GoofyFoot Labs proposes TESI3d, a CAD tool to efficiently and accurately explore the complex 3-D design space. We will develop a full-scale prototype, which will then be used to design and evaluate 3-D systems.

* Information listed above is at the time of submission. *

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