Ultra Low Power Electronics for Autonomous Micro-Sensor Applications

Award Information
Agency: Department of Defense
Branch: Air Force
Contract: FA8650-10-M-1857
Agency Tracking Number: F093-159-0937
Amount: $99,606.00
Phase: Phase I
Program: SBIR
Awards Year: 2010
Solicitation Year: 2009
Solicitation Topic Code: AF093-159
Solicitation Number: 2009.3
Small Business Information
1 Research Boulevard, Suite 200, Suite 200, Starkville, MS, 39759
DUNS: 791134542
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 George Ansel
 Senior Technical Staff
 (662) 320-1015
Business Contact
 James Merchant
Title: VP Advanced Microelectronics
Phone: (662) 320-1018
Email: dmerchant@camgian.com
Research Institution
This program aims to develop an ultra low power System-on-a-Chip (SoC) technology that will enable >10x improvements in size and endurance over current generation wireless micro-sensor networks. This will be achieved through the integration of advanced circuit and architectural design methods targeted to improve wireless micro-sensor node performance in four critical performance parameters: (1) digital circuit design methodologies that enable the energy consumption of the chip to be dynamically matched to the performance needs of the system;(2) digital circuit design styles that minimize crosstalk noise to radio-frequency (RF) and other analog circuits;(3) advanced power and voltage gating and scaling techniques that reduce idle (leakage) energy consumption; and (4) System on Chip (SoC) design architectures optimizing energy, cost, and size. These elements will be integrated with a unique RF circuit architecture which has improvements in RF switches for signal steering to antennas, power amplifiers for transmitter output, direct digital synthesis, and high-frequency mixers for carrier modulation and received signal down-conversion. While the technical approaches to intelligent, adaptive, ultra-low power, low-noise circuits will be generic and broadly applicable to DoD systems a specific hardware architecture will be developed based on an intelligent wireless micro-sensor node. BENEFIT: The successful program will lead to improvements in the cost, size, weight, and power (CSWAP) metric of wireless sensors. The CSWAP reduction is achieved partially through dramatic reduction of the electronics power and energy consumption which leads directly to smaller power source requirements and higher integration capability. A further driver of CSWAP reduction is the use of NCL clockless logic which gives lower noise crosstalk from the digital processing circuitry to the critical RF and analog circuits. An additional benefit of the program which drives CSWAP improvement is the integration of NCL digital processing circuits with an innovative new RF circuit architecture which has improvements in critical performance areas. The initial products targeted for deployment will be wireless micro-sensor systems such as are used for border security, military intelligence, military battlefield surveillance, and SmartGrid power system monitoring.

* Information listed above is at the time of submission. *

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