Space Qualified Satellite Hypervisor for COTS Processors

Award Information
Agency: Department of Defense
Branch: Defense Advanced Research Projects Agency
Contract: W31P4Q-13-C-0156
Agency Tracking Number: D131-009-0058
Amount: $99,989.00
Phase: Phase I
Program: SBIR
Awards Year: 2013
Solitcitation Year: 2013
Solitcitation Topic Code: SB131-009
Solitcitation Number: 2013.1
Small Business Information
Emergent Space Technologies, Inc
6411 Ivy Lane, Suite 303, Greenbelt, MD, -
Duns: 101537046
Hubzone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Travis Wheatley
 Principal Investigator
 (301) 345-1535
 travis.wheatley@emergentspace.com
Business Contact
 Everett Cary
Title: Vice President
Phone: (301) 345-1535
Email: everett.cary@emergentspace.com
Research Institution
N/A
Abstract
There are many data intensive mission payloads for intelligence, surveillance and reconnaissance (ISR) that collect more data than is practical to transmit through the downlink. The ability to autonomously process and classify this data on board can significantly reduce the downlink bandwidth requirements, thereby making it more feasible to transmit products directly to commanders in the field or even the warfighter themselves. However, existing space-qualified processors do not have the raw processing power necessary to achieve this for many applications. There are commercial-off-the-shelf (COTS) processors that could meet the processing requirements. A space-qualified-hypervisor implementation would allow the use of COTS components in order to meet the reliability requirements for a space based implementation by employing redundancy and also provide parallel processing opportunities that would greatly enhance the ability to meet the requirements of data intensive missions. Emergent Space Technologies, Inc. proposes to conduct feasibility studies, technical analysis and simulation, and to conduct small scale proof of concept demonstrations during Phase 1 of this project to determine the space qualify-ability of a Type 1 hypervisor based off of an existing COTS processor.

* information listed above is at the time of submission.

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