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Advanced Architecture and Process Techniques for High-Density, Radiation-Hardened Non-Volatile Memory

Award Information
Agency: Department of Defense
Branch: Missile Defense Agency
Contract: HQ0006-10-C-7286
Agency Tracking Number: B2-1673
Amount: $1,499,800.00
Phase: Phase II
Program: SBIR
Solicitation Topic Code: MDA08-023
Solicitation Number: 2008.3
Solicitation Year: 2008
Award Year: 2010
Award Start Date (Proposal Award Date): 2010-09-30
Award End Date (Contract End Date): 2012-09-30
Small Business Information
500 Wynn Dr. Suite 314, Huntsville, AL, -
DUNS: 196595607
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Jeff Dame
 Principle Investigator
 (256) 319-0860
Business Contact
 Rob Calahan
Title: Business Manager
Phone: (256) 722-7200
Research Institution
For mission critical data storage on systems operating in natural space and nuclear weapons environments, the use of radiation hardened (RH) non-volatile memory (NVM) is imperative. Today’s complex computer controlled electronic systems use NVM to store critical data for proper operation. This typically includes configuration parameters which allow the system to return to a known configuration after the loss of power. If the critical data becomes corrupted, system recovery and operation is severely impacted. Current state of the art technologies being evaluated for RH NVM include Magnetoresistive Random Access Memory (MRAM) (1Mb), Ferroelectric Random Access Memory (FeRAM), chalcogenide-based Phase-change Random Access Memory (PRAM) (1Mb), and silicon-oxide-nitride-oxide-silicon (SONOS) (4Mb) based devices. Of these, the only qualified RH NVM technology commercially available today is the SONOS based memory. Development of higher bit-density SONOS memories is necessary to meet increasing system demands for critical data storage. During this effort, we will design a 128Mb RH NVM using the advanced NVM architecture and materials identified in Phase I. Relevant test structures will be fabricated in an advanced RH CMOS process to demonstrate functionality of key elements of the NVM design. Operational parameters of these structures will be characterized, including read/write times, retention, endurance, etc.

* Information listed above is at the time of submission. *

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