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Wideband RF Photonic Link with Real-Time Digital Post Processing

Award Information
Agency: Department of Defense
Branch: Navy
Contract: N00014-14-P-1217
Agency Tracking Number: N14A-023-0123
Amount: $80,000.00
Phase: Phase I
Program: STTR
Solicitation Topic Code: N14A-T023
Solicitation Number: 2014.
Timeline
Solicitation Year: 2014
Award Year: 2014
Award Start Date (Proposal Award Date): 2014-08-04
Award End Date (Contract End Date): 2015-06-04
Small Business Information
1340 Charwood Road, Suite L, Hanover, MD, -
DUNS: 137352246
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Dalma Novak
 Vice President, Engineeri
 (410) 590-3333
 dnovak@pharad.com
Business Contact
 Austin Farnham
Title: President
Phone: (410) 590-3333
Email: afarnham@pharad.com
Research Institution
 Johns Hopkins University
 Thomas Clark
 Johns Hopkins University, APL
11100 Johns Hopkins Rd MS1E1
Laurel, MD, 20723-6099
 (443) 778-7220
 Nonprofit college or university
Abstract
Pharad is teaming with the Applied Physics Laboratory of The Johns Hopkins University to propose and investigate the feasibility of wideband (VHF to SHF) RF-to-digital photonic link architectures with real-time digital signal processing (DSP) that can meet the stringent performance metrics of military systems. The key requirements for our wideband DSP linearized RF-to-digital photonic link include a fiber distance of 300 meters, a minimum spurious-free dynamic range (SFDR) of 120 dB-Hz2/3, and a 2 GHz instantaneous bandwidth. Our Phase I study will explore the trade-offs of several RF-to-bits photonic link architectures and compare the achievable link performance as well as the hardware implementation complexities, with a specific focus on the potential to minimize the size, weight and power (SWaP) required by the electronic back-end digital signal processing (DSP) subsystem. We will carry out theoretical analyses as well as benchtop proof-of-concept demonstrations that will provide experimental validation of the proposed wideband, high dynamic photonic RF-to-bits link architectures incorporating real-time processing. Based on the outcome of our Phase I trade studies we will create a design solution for an RF-to-bits photonic link with an electronic backend processor that provides the optimal combination of linearity performance, hardware complexity, and opportunity for low SWaP.

* Information listed above is at the time of submission. *

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