Radiation hard, nonvolatile, NRDO memory elements
Department of Defense
Missile Defense Agency
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Small Business Information
7 Commerce Drive, Danbury, CT, 06810
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AbstractMetal-ferroelectric-semiconductor field effect transistors (MFS-FETs) have a can be used as nonvolatile memory devices. The primary ferroelectric materials for these devices are perovskite oxides such as lead zirconium titanate (PZT) and strontium bismuth tantalate (SBT). These materials contain highly mobile elements (Pb and Bi) that can interact with silicon at process temperatures and lead to a high density of mobile charge traps at the interface. An additional oxide layer between the ferroelectric and silicon has been proposed to serve as a diffusion barrier. In practice, deposition of this barrier oxide typically involves introduction of oxygen at heated silicon wafer surface and an unwanted low permittivity silicon oxide layer is formed on the silicon surface. We recently developed a process that offers the opportunity to produce an interface with minimal formation of interfacial oxide. In Phase I, we will demonstrate the feasibility of this novel process in suppressing parasitic oxide formation. MIS and MFIS capacitors will be fabricated using PZT and SrTiO3 as the ferroelectric and the barrier materials. Phase II will result in an optimized process for MFIS-FET transistors for nonvolatile memory applications, to be fabricated in collaboration with an industrial partner that will be identified in Phase I.
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