Discrete/Continuous Control Approach for Advanced Mirror Actuator
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AbstractThis proposal addresses full digital control of the Line of Sight (LOS) Stabilization system required for advanced infra-red (IR) seekers employing strap down sensors and inertially stabilized optics, while maintaining the LOS degrees of freedom to supportmissile interceptor requirements.The effort proposed is an extension of a proof of concept demonstration conducted by Aero Thermo Technology, Inc. for the AIT Program Office. The proof of concept demonstration showed that a conceptually simple discrete-time control system algorithm canbe hosted in a Programmable Logic Device (PLD), and that execution can be performed with a time delay of significantly less than one microsecond.The proposed effort is to investigate and demonstrate several innovative approaches to resolve issues of attaining the full performance potential of the digital control algorithm. While risk exists, the results are expected to increase the flatamplitude/phase response by 20% to 30%. By employing innovative approaches such as Discrete/Continuous Control and Bumpless Discrete-Time Control to this application, it is possible to reach both the requirements and goals of the AIT LOS Stabilizationsystem in a commercially available digital implementation using either a Programmable Logic Device or a Field Programmable Gate Array.Upon completion of the Phase I demonstrations and the design of the proposed Phase II hardware, Aero Thermo Technology,Inc. plans to fabricate the totally integrated digital controller for the steering mirrors and to participate in the integrated demonstration of the AIT Advanced Processor architecture with the AIT processor of choice.Upon completion of the Phase II efforts and integrated demonstrations, the advantages of a PLD and FPGA based architecture will be as follows:(1)Enables an all-digital LOS Stabilization control system that is capable of being packaged for on-board missile implementation of LOS Stabilization and LOS Reconstruction at the data rates and accuracies required by advanced interceptors such as the AITbaseline concept.(2)Demonstrates un-burdening the I/O bound processors by performing all I/O interfacing through FPGAs that interface to the processor through a switch fabric (cross bar switch).(3)Functions in an architecture independent configuration that is expandable and scalable.(4)Demonstrates closed loop control that is processor independent.(5)Demonstrates drift independence of temperature.(6)Demonstrates extremely low data latency (time delay) meeting AIT LOS Stabilization requirements.(7)Demonstrates control loop optimization without necessity to modify analog board circuits.(8)Demonstrates independence from Application Specific Integrated Circuits (ASIC).(9)Demonstrates major reduction of components (parts counts) leading to lower cost and increased reliability.(10)Establishes architecture for hardware re-use for other closed-loop control system applications.(11)Demonstrates performance meeting requirements of the AIT LOS Stabilization system.
* information listed above is at the time of submission.