An Optoelectronic Ultra Low Power RAM
Department of Defense
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Three Corporate Drive, Shelton, CT, 06484
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AbstractThe digital signal processing and static memory is currently dominated exclusively by CMOS technology with the 6-T cell implementing all static memory. CMOS is the only VLSI technology. However, CMOS is near the end of its scaling potential and it has a severe liability for space applications due to a weakness to radiation. Further, the 6T cell is relatively area and power consumptive and falls well short of the requirements for next generation satellites. ODIS proposes an optoelectronic solution based upon a monolithic technology platform for O and E devices. A key element in the device group is the thyristor which has both laser and detector functions. The thyristor has a very low power storage mode that enables a single device memory cell that may be dynamic or a static memory cell. The dynamic version offers the lowest possible power of any known semiconductor memory. Both the read and write operations are performed optically with on-chip light sources enabling very high speed and high density memory arrays. In addition to the ultra-low power memory , the thyristor also enables a low power logic gate. In this SBIR, ODIS will demonstrate the first integrated low power dynamic ram and logic cell BENEFIT: The digital processor market is several billion dollars with steady growth potential based upon an expending PC industry. As CMOS is constrained by power and speed , the opportunity for GaAs based circuits is significant. The wireless industry is already using all of the GaAs amplifiers that are produced. One can therefore expect a market opportunity for GaAs based memory products with large up-side potential. Digital products can now be added to a growing number of markets addressed by integrated optoelectronics including AD converters, imager products, parallel optical data links, optical interface circuits, phased array receivers and other markets currently dominated by Si.
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