Next-Generation Target State Estimation Algorithms for the Interception of Maneuvering Ballistic Missiles

Award Information
Agency: Department of Defense
Branch: Missile Defense Agency
Contract: HQ0006-10-C-7267
Agency Tracking Number: B083-004-0582
Amount: $1,000,000.00
Phase: Phase II
Program: SBIR
Awards Year: 2010
Solicitation Year: 2008
Solicitation Topic Code: MDA08-004
Solicitation Number: 2008.3
Small Business Information
95 First Street, Suite 240, Los Altos, CA, 94022
DUNS: 829385509
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 P. Menon
 Chief Scientist
 (650) 559-8585
Business Contact
 P. Menon
Title: President
Phone: (650) 559-8585
Research Institution
Hit-to-kill interception of ballistic missile targets is a challenging task requiring the use of highly accurate state estimators for mission success. Estimators based on conventional filtering technologies have now reached a certain level of sophistication, beyond which little additional performance improvements appear feasible. Phase I project developed a new approach for target state estimation which was shown to outperform existing algorithms. A realistic seeker model with non-Gaussian noise and a nonlinear dynamic model capable of reproducing a wide variety of ballistic missile motions observed in practice, were employed in the work. Feasibility of real-time operation of the target state estimation algorithm on a high-performance computing platform was then demonstrated. Phase II work will scale-up the target state estimator including all the model and algorithm refinements. A real-time hardware implementation suitable for assessment in hardware/software-in-the-loop simulation will be created. User interfaces will be provided to help tune the estimator to accommodate actual sensor noise characteristics. Under a subcontract with a major airframe integrator, the estimator performance will be evaluated in Monte Carlo simulations and hardware/software-in-the-loop simulations. Production and flight test of the integrated hardware-software system will be undertaken in collaboration with a systems integrator during the Phase III work.

* Information listed above is at the time of submission. *

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