VHDL Behavioral Synthesis Tool for Low Power Based on FRITS

Award Information
Agency: Department of Defense
Branch: Air Force
Contract: N/A
Agency Tracking Number: 27984
Amount: $749,889.00
Phase: Phase II
Program: SBIR
Awards Year: 1996
Solicitation Year: N/A
Solicitation Topic Code: N/A
Solicitation Number: N/A
Small Business Information
22 Haverhill Road P.o. Box, 128, Windham, NH, 03087
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Seguei A. Sokolov
 (603) 437-2234
Business Contact
Phone: () -
Research Institution
Low power has been recently elevated to one of the most critical issues in circuit design, affecting circuit reliability, battery life, and heat sinking. In spite of this demand, surprisingly little support from CAD vendors exists for automated low power circuit design. Alternative System Concepts (ASC) and Princeton University propose to design and develop a much needed power optimizing design automation tool incorporating recent research advances in the area of high-level synthesis for low power. The proposed development tightly couples advanced research at Princeton and innovative VHDL-based CAD tools developed by ASC. The new tool will implement VHDL behavioral synthesis for low power, transforming a behavioral VHDL description into a structural VHDL description, optimized for power dissipation. Power minimization will be achieved by simultaneously applying: 1) voltage scaling for fixed throughput; 2) minimization of switching activity in the circuit; 3) reduction of capacitive loads through minimization of module count and interconnect. Combining low power, area, and performance as co-objectives in the synthesis process will ensure globally optimal designs. Existing and newly developed methods for transformation, scheduling, and allocation will be integrated into ASC's FRITS object-oriented VHDL framework.

* Information listed above is at the time of submission. *

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