Advanced Architecture and Process Techniques for High-Density, Radiation-Hardened Non-Volatile Memory

Award Information
Agency: Department of Defense
Branch: Missile Defense Agency
Contract: W9113M-09-C-0089
Agency Tracking Number: B083-023-0243
Amount: $99,997.00
Phase: Phase I
Program: SBIR
Awards Year: 2009
Solicitation Year: 2008
Solicitation Topic Code: MDA08-023
Solicitation Number: 2008.3
Small Business Information
500 Wynn Dr. Suite 314, Huntsville, AL, 35816
DUNS: 196595607
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Jeff Dame
 Prinicpal Investigator
 (256) 319-0860
Business Contact
 Rob Calahan
Title: Business Manger
Phone: (256) 722-7200
Research Institution
For mission critical data storage on systems operating in natural space and nuclear weapons environments, the use of radiation hardened non-volatile memory (NVM) is imperative. Today’s complex computer controlled electronic systems use NVM to store critical data for proper operation. This typically includes configuration parameters which allow the system to return to a known configuration after the loss of power. If the critical data becomes corrupted, system recovery and operation is severely impacted. Current state of the art technologies being evaluated for radiation hardened NVM include Magnetoresistive Random Access Memory (MRAM) (1Mb), Ferroelectric Random Access Memory (FeRAM), chalcogenide-based Phase-change Random Access Memory (PRAM) (1Mb), and silicon-oxide-nitride-oxide-silicon (SONOS) (4Mb) based devices. Of these, the only qualified radiation-hardened NVM technology commercially available today is the SONOS based memory. Development of increased bit-density SONOS memories is necessary to meet increasing system demands for critical data storage. This Phase I research will identify, optimize and design a SONOS-based NVM cell architecture and demonstrate the feasibility of using the advanced memory cell to design a radiation-hardened large bit-density (64Mb or greater) NVM. The optimized NVM cell structure will be compatible with existing CMOS processes to allow for ease of manufacturability and use in embeddable applications.

* Information listed above is at the time of submission. *

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