Development of Digital Receiver/Exciters for Missile Defense Radars

Award Information
Agency:
Department of Defense
Branch
Missile Defense Agency
Amount:
$100,000.00
Award Year:
2007
Program:
SBIR
Phase:
Phase I
Contract:
W9113M-07-C-0079
Agency Tracking Number:
B063-032-0929
Solicitation Year:
n/a
Solicitation Topic Code:
n/a
Solicitation Number:
n/a
Small Business Information
APPLIED RADAR, INC.
210 Airport Street, Quonset Point, North Kingstown, RI, 02852
Hubzone Owned:
N
Socially and Economically Disadvantaged:
N
Woman Owned:
N
Duns:
041546834
Principal Investigator:
William Weedon
President/CEO
(401) 295-0062
whw@appliedradar.com
Business Contact:
William Weedon
President/CEO
(401) 295-0062
whw@appliedradar.com
Research Institution:
n/a
Abstract
This proposal will address the development of digital receivers and exciters capable of supporting > 1 GHz of instantaneous bandwidth (IBW). The technology will be used in large scalable BMD radar arrays employing a digital waveform generator and digital receiver at the analog input/output of each subarray panel. The receivers/exciters include the necessary up/downconversion and local oscillator circuitry necessary to generate or receive an X-band waveform. Recent developments in > 2 GSPS A/D and D/A chipsets and state-of-the-art FPGA technology allow the real-time processing of wideband (> 1 GHz) radar data, while commercially-available MMIC and PLL chipsets allow the translation of the baseband signals to/from X-band. Several challenges exist in the packaging of the mixed-signal electronics in a manner suitable for a large radar array, routing of the high-speed digital signals both on- and off-board, and cohering of the many receiver/exciter channels across the array. The output of the proposed digital receiver/exciter channels would likely be fed to a wideband digital beamformer array. In Phase I, Applied Radar will design the digital receiver/exciter hardware for a single channel, and develop a multi-channel hardware architecture and packaging approach. In Phase II, the hardware will be fabricated and tested, and integrated with an array such as an MDA SPEAR panel.

* information listed above is at the time of submission.

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