Field Programmable Automations Sytem (F-PAS)

Award Information
Agency: Department of Defense
Branch: Defense Advanced Research Projects Agency
Contract: W31P4Q-08-C-0317
Agency Tracking Number: 06SB2-0093
Amount: $749,719.00
Phase: Phase II
Program: SBIR
Awards Year: 2008
Solicitation Year: 2006
Solicitation Topic Code: SB062-006
Solicitation Number: 2006.2
Small Business Information
700 Bishop St., Suite 2000, Honolulu, HI, 96813
DUNS: 152357393
HUBZone Owned: N
Woman Owned: Y
Socially and Economically Disadvantaged: N
Principal Investigator
 J. Hunter Downs III
 Chief Science Officer
 (808) 221-2131
 hunter@archinoetics.com
Business Contact
 Traci Downs
Title: Chief Operating Officer
Phone: (808) 382-0314
Email: traci@archinoetics.com
Research Institution
N/A
Abstract
Field Programmable Gate Arrays (FPGAs) are growing in popularity due to their high performance capabilities and reprogrammable nature well-suited for development of specific high-speed processing applications. However, the design process for FPGA implementation is time-consuming with multiple complexities that stem from the numerous steps involved, each with a separate CAD tool, requiring the involvement of several engineers with various expertise for each design iteration. The F-PAS (Field-Programmable Automation System) application simplifies the FPGA design flow while intelligently producing the best implementation solution for the specific design requirements. The intelligent automation of the F-PAS solution simulates the design process of experts for every stage of the implementation process and leverages expertise gained only by experience, empowering even a novice engineer to implement effective designs with the option of user input or intervention at any stage of the design process. Phase I efforts produced a prototype system that streamlines the design process and finds the best synthesis implementation. Proposed Phase II work will mature the existing prototype to market-ready application by including additional vendor tools into the interface and refining the optimization process to implement the best design solutions for a wide variety of applications and design requirements faster and more effectively.

* Information listed above is at the time of submission. *

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