X-Ray Detectors for Synchrotron-Based Structural Biology

Award Information
Agency:
Department of Health and Human Services
Branch
n/a
Amount:
$6,496,772.00
Award Year:
2003
Program:
SBIR
Phase:
Phase II
Contract:
2R44RR014613-02
Award Id:
65502
Agency Tracking Number:
RR014613
Solicitation Year:
n/a
Solicitation Topic Code:
n/a
Solicitation Number:
n/a
Small Business Information
AREA DETECTOR SYSTEMS CORP, 12550 STOWE DR, POWAY, CA, 92064
Hubzone Owned:
N
Minority Owned:
N
Woman Owned:
N
Duns:
n/a
Principal Investigator:
RONALD HAMLIN
(858) 486-0444
RH@ADSC-XRAY.COM
Business Contact:
THOMAS HONTZ
(858) 486-0444
SALES@ADSC-X-RAY.COM
Research Institute:
n/a
Abstract
DESCRIPTION (provided by applicant): Development is proposed of an x-ray Pixel Array Detector (PAD) consisting approximately of 2,000 x 2,000 pixels to enhance macromolecular crystallographic data collection at synchrotron sources. A PAD consists of an x-ray sensing integrated circuit layer bonded to a pixel electronics layer such that each pixel has its own processing electronics. PADs promise to reduce data collection time by up to a factor of 40 relative to existing detectors while improving data quality. They will have specific capability to: 1) Collect a set of monochromatic data (90 degree rotation) in 18 seconds using the standard oscillation method (0.5 degrees per frame, with exposure time of 100 ms per frame) 2) Collect a set of fine-slice data in 90 seconds with a rotation of 0.05 degrees per frame and with an exposure of 50 ms per frame 3) Collect frames at microsecond exposure time for time-resolved protein Laue diffraction. Research during Phase I of this proposal was successful in identifying a mixed-mode analog/digital pixel architecture best suited for the crystallographic application, as well as demonstrating ways of resolving radiation damage concerns. The input signal is analog integrated onto a capacitor, C(int), by a charge to voltage converter in the charge integrator stage using a structure very similar to the one in the existing APAD designs. The voltage on the capacitor is constantly compared to an external reference voltage, V(ref), via a voltage comparator in the threshold detector stage. When the integrated voltage level reaches the reference voltage, a bit is generated and added into an in-pixel digital counter. The threshold detector then also resets the integration capacitor in the charge integrator stage. Thus, each analog cycle of filling C(int) results in an additional digital "count" in the high-order word stored in the in-pixel digital counter. At the end of the exposure frame, the voltage level remaining on C(int) is digitized, if desired, by an analog-to-digital converter (ADC) at the end of each row of pixels. This digitized value is thus the low-order digital word of the exposure Phase II will involve finalization of the specific pixel layout, fabrication of suitably large-area integrated circuits, assembly and application testing of a full-scale PAD.

* information listed above is at the time of submission.

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