New algorithmic hardening schemes and multi-bit error detection/correction to enable the use of commercially derived memories in space
Small Business Information
10701-D Montgomery Blvd NE, Albuquerque, NM, 87111
AbstractThe proposed effort will demonstrate the suitability of a mature commercial production technology in meeting the requirements for a cost effective, high capacity non-volatile memory solution for space systems. The feasibility of mitigating radiation sensitivities in, and improving the reliability of, devices built upon the selected technology will be demonstrated during Phase 1. We will develop and demonstrate new radiation mitigation methodologies which will include novel, compact, and straightforward error detection and correction schemes and algorithmic hardening schemes to enable the use of commercial electronics and commercially derived technologies in space. The combination of these approaches will provide a practical pathway to development of high performance non-volatile memory solutions built on or around commercial platforms capable of providing full triple bit error correction with a worst-case BER of 1.18E-19 err/bit/day, and a storage capacity suitable for use in data recorders and as high gate count FPGA boot ROMs. BENEFIT: These innovative hardening methods will be an important element of the foundation for a practical pathway to overcome limitations that continue to plague space system developers. The proposed approaches and methodologies will enable the reliable use of suitable commercial and commercially derived non-volatile memory devices and technologies to serve as robust, ultra-high reliability platforms upon which to build next generation, high capacity, and radiation hardened products. This pathway will allow space system designers greater flexibility to develop new system designs and architectures while improving their ability to leverage emerging commercial system designs and architectures. This will improve the responsiveness of space systems at reduced cost. The proposed approach will lead to sustainable and scalable solutions providing improved power, weight, volume, and performance of space computers while enabling the use of contemporary and emerging configurable space processors based on commercial electronics advancements. Once demonstrated, these methods can be implemented within the design of memory products to provide practical and robust companion boot ROM solutions for FPGAs as well as a useful, simple, and high capacity platform for high reliability data recorders and mass storage systems. Potential Commercial Applications: Code and data storage products for high reliability commercial, civil, and military aerospace computation, communication, and navigation systems, including flight computers, controls, and avionics for spacecraft, aircraft, and UAVs; industrial and automotive controls and electronics; single chip companion boot ROMs for high reliability FPGAs including SIRF, XTMR Virtex designs, Achronix high speed configurable logic devices, and Altera Stratix devices.
* information listed above is at the time of submission.