Aries Design Automation, LLC

Company Information

Company Name
Aries Design Automation, LLC
Address
IL
Chicago, IL, 60618-3745
Phone
1 773-856-6633
URL
http://www.aries-da.com
DUNS
361627933
Number of Employees
5
Hubzone Owned:
N
Minority Owned:
N
Woman Owned:
N

Award Totals

PROGRAM/PHASE
AWARD AMOUNT ($)
NUMBER OF AWARDS
SBIR Phase I
$1,415,000.00
13
SBIR Phase II
$1,800,000.00
3
STTR Phase I
$100,000.00
1
Chart code to be here

Award List

  1. Reconfigurable VLIW Processor for Software Defined Radio

    Amount: $100,000.00

    We will design and formally verify a VLIW processor that is radiation-hardened, and where the VLIW instructions consist of predicated RISC instructions from the PowerPC 750 Instruction Set Architectur ...

    SBIR Phase I 2010 National Aeronautics and Space Administration
  2. An Efficient Parallel SAT Solver Exploiting Multi-Core Environments

    Amount: $600,000.00

    The hundreds of stream cores in the latest graphics processors (GPUs), and the possibility to execute non-graphics computations on them, open unprecedented levels of parallelism at a very low cost. In ...

    SBIR Phase II 2010 National Aeronautics and Space Administration
  3. SBIR Phase I: Automatic Formal Verification of Chip-Multi-Threaded Multicore Processors

    Amount: $150,000.00

    This Small Business Innovation Research (SBIR) Phase I project will result in an efficient and scalable method for design and formal verification of Chip-Multi-Threaded multicore processors, where the ...

    SBIR Phase I 2010 National Science Foundation
  4. Exploiting GPUs for Scalable Network Intrusion Detection

    Amount: $100,000.00

    In this proposed SBIR Phase I project, we will develop a proto

    SBIR Phase I 2010 Department of Energy
  5. Formal Methods for Malware Detection

    Amount: $100,000.00

    Our objective is to develop highly automatic and scalable formal methods for malware detection. Existing tools for malware detection operate by searching for pattern matches with respect to signatures ...

    SBIR Phase I 2006 Office of the Secretary of DefenseDepartment of Defense
  6. Formal-Verification-Based Tool for Deobfuscation of Tamper-Proofed Software

    Amount: $100,000.00

    The rapid increase in the use of the Internet in many aspects of our lives has led to an explosive growth in the spread of malware such as computer worms, viruses, and trojans. Security tools typicall ...

    STTR Phase I 2006 Office of the Secretary of DefenseDepartment of Defense
  7. SBIR Phase I: Techniques for Analysis of Counterexamples from Formal Verification of High-Level Microprocessor Designs

    Amount: $100,000.00

    This Small Business Innovation Research (SBIR) Phase I research proposes to study the feasibility of automatic methods for analysis of counterexamples from formal verification of pipelined and supersc ...

    SBIR Phase I 2006 National Science Foundation
  8. Efficient Techniques for Formal Verification of PowerPC 750 Executables

    Amount: $100,000.00

    We will develop an efficient tool for formal verification of PowerPC 750 executables. The PowerPC 750 architecture is used in the radiation-hardened RAD750 flight-control computers that are utilized i ...

    SBIR Phase I 2008 National Aeronautics and Space Administration
  9. Efficient Techniques for Formal Verification of PowerPC 750 Executables

    Amount: $600,000.00

    We will develop an efficient tool for formal verification of PowerPC 750 executables. The PowerPC 750 architecture is used in the radiation-hardened RAD750 flight-control computers that are utilized i ...

    SBIR Phase II 2009 National Aeronautics and Space Administration
  10. An Efficient Parallel SAT Solver Exploiting Multi-Core Environments

    Amount: $100,000.00

    The hundreds of stream cores in the latest graphics processors (GPUs), and the possibility to execute non-graphics computations on them, open unprecedented levels of parallelism at a very low cost. We ...

    SBIR Phase I 2009 National Aeronautics and Space Administration

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