DESIGN AND IMPLEMENTATION OF HIGH-PRECISION AND HIGH PERFORMANCE PARALLEL SOFTWARE AND HARDWARE

Award Information
Agency:
Department of Defense
Branch
Air Force
Amount:
$50,000.00
Award Year:
1987
Program:
SBIR
Phase:
Phase I
Contract:
n/a
Award Id:
5545
Agency Tracking Number:
5545
Solicitation Year:
n/a
Solicitation Topic Code:
n/a
Solicitation Number:
n/a
Small Business Information
423 W 120th St - #88, New York, NY, 10027
Hubzone Owned:
N
Minority Owned:
N
Woman Owned:
N
Duns:
n/a
Principal Investigator:
DR GREGORY V CHUDNOVSKY
(212) 864-5320
Business Contact:
() -
Research Institution:
n/a
Abstract
WE PROPOSE A STUDY OF AN OPTIMAL DESIGN FOR A POWERFUL SINGLE PROCESSOR AND A PARALLEL ORGANIZATION OF SUCH PROCESSORS FOR THE PURPOSE OF SIGNIFICANT IMPROVEMENT OF SUPERCOMPUTER PERFORMANCE. WE PLAN TO DETERMINE THE OPTIMAL DESIGN OF THE LST SINGLE PROCESSOR WITH THE LARGEST POSSIBLE WORD SIZE FROM THE POINT OF VIEW OF CURRENTLY COMMERCIALLY AVAILABLE VLSI TECHNOLOGY. SIMULTANEOUSLY, WE WILL INVESTIGATE THE BEST PARALLEL ORGANIZATION OF POWERFUL PROCESSORSTO ACHIEVE THE BEST PERFORMANCE OF THE PARALLEL IMPLEMENTATION OF PRACTICALLY IMPORTANT MATHEMATICAL AND ENGINEERING ALGORITHMS. NEW PARALLEL ALGORITHMS WILL BE INVESTIGATED IN SUCH AREAS AS: SIGNAL PROCESSING (CONVOLUTIONS OF LARGE DATA ARRAYS AND CODING THEORY), GRAPHIC PROCESSING AND NUMERICAL ANALYSIS (SOLUTION OF ALGEBRAIC AND DIFFERENTIAL EQUATIONS). PARTICULAR ATTENTION WILL BE DEVOTED TO THE FEASIBILITY STUDY OF AN EFFICIENT PARALLEL/VECTOR COMPILER FOR FORTRAN AND APL. OPTIMIZATION OF COMMUNICATION, MEMORY ACCESS AND PROCESSOR CLUSTERING WILL BE ADDRESSED. THE ORGANIZATION OF PROCESSORS AND THE PERFORMANCE OF EACH PROCESSOR WILL BE ANALYZED PRIMARILY FROM THE POINT OF VIEW OF HIGH PRECISION OPERATIONS AND OPERATIONS ON LONG DATA ARRAYS NECESSARY IN SIGNAL AND GRAPHIC PROCESSING, NUMBER THEORY AND LARGE SCALE NUMERICAL AND ENGINEERING PROBLEMS.

* information listed above is at the time of submission.

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