INTEGRATED GAAS EMITTER FOR OPTICAL INTERCONNECTIONS

Award Information
Agency:
National Science Foundation
Branch
n/a
Amount:
$40,000.00
Award Year:
1987
Program:
SBIR
Phase:
Phase I
Contract:
n/a
Award Id:
5269
Agency Tracking Number:
5269
Solicitation Year:
n/a
Solicitation Topic Code:
n/a
Solicitation Number:
n/a
Small Business Information
30 Lovett Ave, Newark, DE, 19711
Hubzone Owned:
N
Minority Owned:
N
Woman Owned:
N
Duns:
n/a
Principal Investigator:
() -
Business Contact:
James B. Mcneely
Director
() -
Research Institution:
n/a
Abstract
THE EFFECT OF SCALING DOWN DEVICE DIMENSIONS OF VLSI STRUCTURES AND THE COMBINATION OF INCREASED CIRCUIT COMPLEXITY DURING THE SCALING PROCESS IS PLACING SEVERE LIMITATIONS ON THE MINIMUM PROPAGATION DELAY OF METALLIC INTERCONNECTS. OPTICAL INTERCONNECTS REMOVE THOSE SPEED LIMITATIONS AND OFFER A DEGREE OF FLEXIBILITY THAT ELECTRICAL INTERCONNECTS COULD NEVER OBTAIN. THE KEY OPPORTUNITY IS TO INTEGRATE GAAS OPTICAL EMITTERS ONTO ADVANCED SILICON VLSI CIRCUITS, AND TO USE THE GAAS AS AN OPTICAL SOURCE TO COMMUNICATE EITHER BY DIRECT OPTICAL INTERACTION WITH SILICON DETECTORS, OR BY HOLOGRAPHIC OR LIGHT-GUIDED TECHNIQUES. ASTROPOWER IS PROPOSING TO DEVELOP A HIGH QUALITY, INTEGRATED GALLIUM ARSENIDE HETEROEPITAXY EMITTER ON THE SILICON VLSI CIRCUIT ELEMENT. SELECTIVE LIQUID-PHASE EPITAXY THROUGH VIAS IN A PASSIVATION LAYER ON THE VLSI WAFER WILL BE USED TO GROW THE GAAS EMITTER DIODE. STRAIN AND DISLOCATIONS IN THE EMITTER DIODE WILL BE MINIMIZED BY CAREFUL CONTROL OF THE NUCLEATION INTERLAYER AND BY REDUCING THE GAAS-SILICON CONTACT AREA TO A SMALL FRACTION OF THE EMITTER AREA. THE DEMONSTRATION OF THE INTEGRATED GAAS OPTICAL EMITTER WILL BE A DRAMATIC STEP FORWARD IN PROGRESS TOWARD OPTICALLY-INTEGRATED CIRCUITS FOR A NEW GENERATION OF ULTRA HIGH SPEED ELECTRONIC DEVICES.

* information listed above is at the time of submission.

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